I2C (also referred to as I2C) is a multi-master serial single-ended bus used for attaching low-speed peripherals to a motherboard, embedded system, cellphone, or other electronic devices. The I2C bus includes a clock (SCL) and data (SDA) lines with 7-bit addressing. The bus has two roles for devices: master and slave. A master device is a node that generates the clock and initiates communication with slave devices. A slave device is a node that receives the clock and responds when addressed by the master device. The I2C bus is a multi-master bus which means any number of master devices can be present. Additionally, master and slave roles may be changed between messages (after a STOP is sent). I2C defines basic types of messages, each of which begins with a START and ends with a STOP.
I2C (also referred to as I2C) is a multi-master serial single-ended control data bus used for attaching low-speed peripherals to a motherboard, embedded system, cellphone, or other electronic devices. The I2C control data bus includes a clock (SCL) and data (SDA) lines with 7-bit addressing. The control data bus has two roles for nodes: master and slave. A master node is a node that generates the clock and initiates communication with slave nodes. A slave node is a node that receives the clock and responds when addressed by the master. The I2C control data bus is a multi-master control data bus which means any number of master nodes can be present. Additionally, master and slave roles may be changed between messages. I2C defines basic types of messages, each of which begins with a START and ends with a STOP.
In this context of a camera implementation, unidirectional transmissions may be used to capture an image from a sensor and transmit such image data to memory in a baseband processor, while control data may be exchanged between the baseband processor and the sensor as well as other peripheral devices. In one example, a Camera Control Interface (CCI) protocol may be used for such control data between the baseband processor and the image sensor (and/or one or more slave devices). In one example, the CCI protocol may be implemented over an I2C serial bus between the image sensor and the baseband processor.
An extension to CCI called CCIe (Camera Control Interface extended) has been developed that encodes information for transmission over the shared bus. CCIe does not implement a separate clock line on the shared bus. Instead, it embeds a clock within the transmitted transcoded information.
CCIe is designed to coexist with I2C-compatible devices and share the same bus. For instance, CCIe-compatible devices and I2C-compatible devices may operate concurrently on a shared data control bus. While I2C-compatible devices use a first line of the bus for data and a second line of the bus for a clock, CCIe-compatible devices use both bus lines for data transmissions. The CCIe protocol permits improving the data rate over the two-line bus while I2C-compatible devices are coupled to the shared bus. CCIe-compatible devices are being introduced while I2C-compatible devices are phased out. Eventually, when I2C-compatible devices are phased out, CCIe-only buses may be used. At some point in the future, CCIe may be phased out by the introduction of next generation devices.
It is during this phase out period of CCIe-compatible devices that a mechanism may be needed to allow it to coexist with next generation devices. For instance, in buses that may be shared by both legacy devices (e.g., CCIe-compatible devices) and next-generation devices, a mechanism is needed to allow slave devices to be selectively disabled by next-generation devices.
Therefore, a solution is needed that allows selectively disabling legacy devices (e.g., CCIe-compatible devices) in a system in which a bus is shared by both legacy devices and next generation devices.